Semiconductors & Advanced Manufacturing
The chip industry's biggest structural shift of the year may not be about transistors at all — it's about how chips talk to each other. Several major deals this week converge on the same conclusion: as AI workloads push data center bandwidth to the breaking point, the industry is racing to replace electrical copper connections with optical ones. Alongside that, semiconductor materials revenues hit record territory, and India's chip manufacturing ambitions took a meaningful step forward.
Light Beats Wire: The Silicon Photonics Boom
AI training clusters are essentially cities of chips — thousands of GPUs that need to exchange enormous volumes of data constantly. The copper wires that traditionally connect them have a bandwidth ceiling and consume significant power. Silicon photonics — transmitting data using light pulses rather than electrical signals, built on the same manufacturing processes as conventional chips — is emerging as the infrastructure layer that makes next-generation AI possible.
The numbers make that case concretely. Tower Semiconductor, an Israel-based specialty foundry (a chip factory that manufactures chips designed by other companies, focused on analog, radio-frequency, and photonics applications rather than cutting-edge logic), secured $1.3 billion in silicon photonics contracts for 2027. That's not a research budget — that's production. Lumentum, which makes the optical components used in data center interconnects, joined the Nasdaq 100 index, a signal of how dramatically Wall Street has re-rated the optical infrastructure market over the past two years.
On the component technology side, POET Technologies and Lumilens announced progress on wafer-level photonic integration for AI optical interconnects. The "wafer-level" part matters: it means photonic components are assembled and tested while still on the silicon disc — before individual chips are cut out — rather than packaged separately afterward. That manufacturing approach improves yield (the percentage of finished chips that actually work) and reduces cost per unit, which is what makes the technology deployable at data center scale rather than just in specialized telecom gear.
A note on sourcing: A post from CommScope — flagged as sponsored, authored by one of their engineers — makes a complementary argument about rack-scale fiber architectures for GPU deployments. The underlying engineering challenge it describes (physical cabling constraints in high-density AI server racks) is real and worth tracking, but the piece is vendor-authored and should be read accordingly.
Advanced Packaging Drives Record Materials Demand
One of the most important structural trends in semiconductors over the past three years is advanced packaging — combining multiple chips into a single module rather than cramming everything onto one giant die. Techniques like CoWoS (Chip on Wafer on Substrate, a TSMC process that physically stacks high-bandwidth memory directly on top of Nvidia's GPU chips) have become central to AI hardware performance. This week, global semiconductor materials revenues hit record levels, with advanced packaging demand cited as a primary driver.
The materials that go into packaging — substrates, specialty resins, copper foils, dielectric films — are a fast-growing share of total chip cost, and their demand is upstream of both AI infrastructure buildout and the broader packaging technology arms race.
Applied Materials — one of the largest semiconductor equipment makers, which sells the machines that deposit thin films, etch circuit patterns, and otherwise construct chip layers — and TSMC (Taiwan Semiconductor Manufacturing Company, the world's dominant contract chipmaker, which makes chips for Apple, Nvidia, AMD, and most everyone else) are expanding their joint AI process development at TSMC's EPIC Center, a dedicated facility in Taiwan where equipment makers and the foundry co-develop next-generation manufacturing processes. This kind of collaboration matters because the tools and the processes they run are deeply interdependent — you can't optimize one without the other.
Also in the power infrastructure story: Cohu, which makes semiconductor test equipment, secured new orders for testing GaN (Gallium Nitride — a compound semiconductor that handles high voltages far more efficiently than silicon) power devices destined for AI data center power architectures. AI clusters consume staggering amounts of electricity; GaN-based power conversion is meaningfully more efficient than silicon at the voltages involved, making it increasingly attractive for the power delivery systems feeding racks of GPU servers.
India's 300mm Moment
The US-China chip war has made geographic diversification of semiconductor manufacturing a strategic imperative — and India is positioning itself as a primary beneficiary. This week, Tata Electronics (the semiconductor arm of India's Tata Group, one of the country's largest conglomerates) and ASML (the Dutch company that makes the lithography machines — the tools that project circuit patterns onto silicon — that every advanced chipmaker in the world depends on for production) announced an expanded strategic collaboration around India's 300mm semiconductor manufacturing buildout.
The "300mm" refers to the diameter of the silicon wafers on which chips are made — larger wafers mean more chips per batch, which means lower cost per chip. 300mm is the industry standard for advanced logic and memory. An ASML collaboration signals that India's chip ambitions are moving past groundbreaking ceremonies into actual equipment procurement and process development — a more concrete indicator of forward progress.
Also Worth Watching
The Semiconductor Newsletter's Week 20 summary flags two additional signals worth noting. NVIDIA and Ineffable Intelligence announced a collaboration targeting reinforcement learning infrastructure — the compute systems used to train AI models through feedback-based iteration, the technique underlying systems like OpenAI's reasoning models. As RL-based training grows more compute-intensive, purpose-built infrastructure for it represents a new and potentially large segment of the AI chip market.
Separately, Honeywell filed registration documents for a proposed IPO of Quantinuum, its quantum computing business. Quantum computing — which exploits quantum mechanical effects to solve certain classes of problems that would take classical computers impractically long — remains pre-commercial for most real-world applications. But an IPO filing suggests Honeywell believes the market is developed enough to support a public standalone company, which is itself a data point about institutional confidence in the sector's timeline.
The Takeaway
The convergence story is optical infrastructure. A few years ago, silicon photonics was a promising research category. Today it's generating billion-dollar contract flows, driving index inclusions, and attracting wafer-level manufacturing investment across multiple companies simultaneously. The reason is structural and won't go away: you can build bigger AI clusters, but eventually the constraint isn't the chips themselves — it's the bandwidth between them. The industry has decided that constraint gets solved with light.
TL;DR - Silicon photonics is going mainstream: Tower Semiconductor locked in $1.3 billion in optical chip contracts for 2027, Lumentum joined the Nasdaq 100, and multiple companies are racing to make optical data center interconnects cost-effective at scale — because AI clusters are running into the hard limits of copper wiring. - Advanced packaging is driving record materials demand: The industry's workaround for slowing transistor shrinkage — stacking chips together in ever-more-sophisticated packages — is now large enough to push global semiconductor materials revenues to all-time highs. - India is getting serious about chips: Tata Electronics and ASML deepened their collaboration on 300mm wafer manufacturing, a sign that India's chip ambitions are moving from political declarations toward actual equipment deals and process development. - Quantum computing edges toward public markets: Honeywell filed to spin out Quantinuum in an IPO — at minimum, a signal that someone with deep visibility into the technology thinks the sector is ready for Wall Street scrutiny.
Compiled from 2 sources · 2 items
- Data Center Dynamics (1)
- The Semiconductor Newsletter (1)