Semiconductors & Advanced Manufacturing

May 13, 2026

Semiconductors & Advanced Manufacturing

The first act of the AI hardware boom was about raw computing power — who made the fastest chips. The second act, now clearly underway, is about a different problem: the chips have gotten so fast that the memory feeding them can barely keep up. That gap — called the Memory Wall — is this week's dominant signal, and capital is moving to close it at remarkable speed. Meanwhile, the physical infrastructure behind AI keeps sprawling across continents, power constraints are forcing operators to build their own electricity generation, and Europe is quietly turning sovereignty rhetoric into actual hardware.

The Memory Wall: AI's Compute Engine Is Outrunning Its Data Supply

For decades, chip progress followed Moore's Law — the observation that you could roughly double the number of transistors (the tiny switches that do computation) on a chip every two years, making processors steadily faster and cheaper. That dynamic is slowing. But even before it fully stalls, AI systems are hitting a different ceiling: they can compute faster than they can get data in and out of memory.

The Semiconductor Newsletter frames this as "The Memory Wall," and by 2026 it has become the organizing bottleneck of the AI supply chain. Large language models don't just need raw processing power — they need to move colossal volumes of data between processors and memory at very high speed, continuously. When memory can't keep up, even the most powerful chip sits idle, waiting.

The industry's answer is HBM — High Bandwidth Memory — a technology where memory chips are stacked vertically on top of each other using tiny vertical connections called Through Silicon Vias (TSVs), then placed directly alongside or beneath the processor. This stacking dramatically shortens the distance data travels. The bandwidth progression has been steep:

HBM2: ~256 GB/s (gigabytes per second)
HBM3: ~819 GB/s
HBM3E (current generation): exceeding 1 TB/s
HBM4 (projected next generation): 1.5–2 TB/s per stack

To anchor the scale: a single Nvidia GB200 — its current flagship AI accelerator — can integrate up to 192 GB of HBM3E memory, and full AI server racks now require terabytes of high-speed memory per deployment. This is not the commodity DRAM in your laptop. HBM is a precision manufacturing product requiring advanced packaging techniques, exceptional yield (the percentage of chips that actually work off the production line), and thermal management that conventional memory doesn't demand. Average selling prices are reportedly several multiples of standard DRAM, with correspondingly stronger margins.

The market signal is hard to miss. The Roundhill Memory ETF — ticker: DRAM, launched April 2, 2026 — surpassed approximately $6 billion in assets under management within just over 30 trading sessions, making it one of the fastest-growing thematic ETF launches in recent memory. While its investment merits are beyond this briefing's scope, that speed of capital accumulation reflects where sophisticated money thinks the AI supply chain is actually constrained. The underlying market supports it: the HBM segment is projected to grow from roughly $4–5 billion in 2024 to more than $30–40 billion annually by the end of the decade — nearly a 10x expansion. The companies that dominate HBM manufacturing — primarily SK Hynix (which currently leads on Nvidia-bound supply), Samsung, and Micron — are no longer commodity memory suppliers. They are critical AI infrastructure.

The Physical Buildout: Power Is the New Square Footage

Behind every AI model is a data center, and this week's dispatches make clear the construction wave shows no sign of cresting — while simultaneously revealing that electricity, not land, is becoming the binding constraint.

In the US, Prime breaks ground next month on two data centers outside Austin. More tellingly, TerraVolt has signed a natural gas supply deal for a planned 200–240MW campus in Idaho — megawatts (MW) being the unit that now defines data center scale, the way square footage defined traditional real estate. For reference, 1MW of continuous draw powers roughly 1,000 American homes. A 200MW facility has the energy appetite of a mid-sized city. The University of Nebraska's new Nvidia-powered system, PLUMAGE, adds 6 H200 GPUs (Nvidia's current high-memory professional accelerator) and 52 L40S GPUs to academic research infrastructure — a reminder that the buildout reaches well beyond the hyperscalers like Google, Microsoft, and Amazon.

Internationally, Equinix — the world's largest data center operator by facility count — is building its fourth Malaysian data center for $190 million, and a separate Malaysian site capable of supporting 800MW is reportedly on the market. Southeast Asia is consolidating as a serious alternative geography for hyperscaler expansion: lower land costs, improving subsea fiber connectivity, and governments actively competing for the investment. A new 392-mile long-haul fiber route connecting Columbus and Chicago, contracted by Lightpath, rounds out the connectivity picture — backbone fiber being the less-glamorous but essential plumbing between regional compute clusters.

The TerraVolt natural gas deal is worth flagging as a structural signal, not a one-off. When utilities can't connect new industrial loads fast enough — and grid capacity queues in the US now stretch years — operators are increasingly building their own on-site generation rather than wait. Gas-powered data centers were a footnote two years ago. They are becoming a standard procurement option.

Europe Builds Its Own Stack: Sovereignty Moves from Declaration to Hardware

European tech policy has produced years of "digital sovereignty" declarations — the aspiration that Europe shouldn't depend entirely on US and Asian chips and cloud platforms. This week offers a small but concrete architectural step. SiPearl, the French chip startup that grew out of the EU's EuroHPC high-performance computing initiative, and Semidynamics, a Spanish company that designs processor cores based on the RISC-V architecture (an open-source chip instruction set that anyone can build on without paying royalties to Intel or ARM), have announced a joint rack-scale compute platform targeting AI inference workloads.

"Rack-scale" means the system is designed at the level of a full server rack — the standard 42-slot cabinet that is the basic unit of data center organization — rather than individual chips. The aim is to keep both the hardware and the data it processes under European jurisdiction, eligible for EU public and private initiatives with sovereignty requirements. This collaboration won't challenge Nvidia for AI training dominance this decade. But it represents the slow accumulation of a European semiconductor alternative — design capability, open-architecture IP, and system integration know-how — that genuinely didn't exist at this stage five years ago.

China's Quantum Claim: A 200-Qubit Neutral Atom System

China's Cold Atom Technology has unveiled the Hanyuan-2, which the company claims is the world's first dual-core neutral atom quantum computer at 200 qubits. A qubit (quantum bit) is the basic unit of quantum computing — unlike a classical bit that is either 0 or 1, a qubit can exist in superposition, effectively holding both states simultaneously, which enables certain calculations that classical computers would take impractically long to solve. Neutral atom systems use individual atoms suspended in laser traps as their qubits — a different physical approach from the superconducting qubits used by IBM and Google, and one that China has been investing in across multiple research programs.

"World's first" quantum computing claims should be treated with appropriate skepticism until independent verification follows — the field has a history of announcements that overstate practical capability relative to error rates and real-world applicability. But the broader signal is consistent with a pattern: China is building across multiple quantum hardware modalities simultaneously, at pace, and with state-backed resources. A 200-qubit dual-core neutral atom system, if the error characteristics hold up, would represent meaningful progress in a technology that remains years from threatening classical computing at scale — but where early positioning matters enormously.

The Takeaway: Follow the Memory

The week's signal, stripped to its core, is a supply chain maturation story. The AI boom started as a chip story. It is becoming a systems story — memory bandwidth, power infrastructure, fiber connectivity, and geopolitical manufacturing independence all becoming constraints simultaneously. Of these, the memory transition deserves the closest attention: the shift from commodity DRAM to HBM as the critical input to AI infrastructure is structural, not cyclical. The companies that control HBM supply — and the packaging technologies behind it — are quietly becoming as strategically significant as GPU designers. That's where the next phase of this story is being written.

TL;DR - AI's real bottleneck is now memory, not computing — chips outrun data supply, driving near-10x projected growth in High Bandwidth Memory, a precision product that's nothing like the commodity DRAM in your laptop - The global data center buildout is accelerating but increasingly power-constrained, with operators in the US now building their own natural gas generation rather than wait years for grid connections - Europe is translating "chip sovereignty" into actual hardware: a French-Spanish collaboration is building a RISC-V-based AI compute platform designed to keep European workloads off US and Asian infrastructure - China claims the world's first dual-core 200-qubit neutral atom quantum computer — verify before believing, but the investment pattern across quantum modalities is real and consistent

Compiled from 2 sources · 21 items

Data Center Dynamics (20)
The Semiconductor Newsletter (1)