Semiconductors & Advanced Manufacturing

The signal this week comes from two directions at once. Capital is flooding into AI infrastructure at a pace that's crossing borders and sectors simultaneously, and the numbers are getting genuinely staggering. Meanwhile, at ISSCC — one of the three major semiconductor engineering conferences of the year — the technical picture clarified considerably on the memory technology that AI chips depend on most. And one of the sharper analysts in the industry is asking a harder question: has the AI displacement of skilled knowledge workers already begun, not gradually, but decisively?


The AI Infrastructure Gold Rush Has Gone Global

The sheer volume of capital committing to AI infrastructure right now defies easy summarization, but this week's headlines make it concrete. Quantitative trading firm Jane Street — one of the most profitable trading operations in the world — signed a $6 billion AI cloud deal with CoreWeave (a GPU cloud provider that rents out access to Nvidia chips at scale for AI workloads) and made a separate $1 billion equity investment in the company. That's a single financial firm betting $7 billion on the continued need for raw AI compute — and doing it by becoming a partial owner of the infrastructure, not just a customer.

The physical buildout matches that financial commitment. Construction started this week on a 204MW data center campus outside Berlin at a cost of €3 billion. A separate 260MW facility was announced in Konin, Poland — also €3 billion. Amazon signed nine PPAs (Power Purchase Agreements — long-term contracts to buy electricity directly from generators, used to lock in power supply for energy-hungry data centers) in Australia covering 430MW of capacity, including its first contracted battery storage outside the US. NTT is scaling across India's regional markets. The geographic spread here is notable: this isn't a US story anymore. It's a global infrastructure buildout, and it's accelerating.

Not everyone is rolling out the welcome mat. Maine just passed the first statewide data center moratorium in the US (pending the governor's signature), officials in Virginia's Prince William County dropped support for a major Digital Gateway project after a court ruling, and a French community is appealing to revoke permits for a planned Telehouse facility in Provence. The backlash is real: data centers consume enormous amounts of water and power, and local communities are beginning to push back in ways that will shape where the next generation of AI infrastructure actually gets built.

One genuinely odd data point: shoe company Allbirds is attempting to pivot into GPU-as-a-Service cloud provision. Whether this is a sign of a frothy market, a desperate pivot by a failing business, or something stranger is unclear — but it's the kind of news that surfaces when a sector is drawing in capital from every direction.


The Memory Race That Powers AI

Every AI chip — the kind that runs the large language models you interact with daily — needs fast memory sitting right next to it to feed data fast enough to keep those processors busy. The dominant technology for this is HBM (High Bandwidth Memory), which stacks multiple memory chips vertically and connects them through tiny holes called through-silicon vias, then attaches the whole stack directly next to the processor. The faster and denser the HBM, the more powerful the AI system.

Right now, SK Hynix — the South Korean memory giant — has been the undisputed leader in HBM, supplying the best chips for Nvidia's most powerful AI accelerators. Dylan Patel's ISSCC roundup this week (ISSCC being the International Solid-State Circuits Conference, one of the chip industry's three major annual engineering convenings, with a particular focus on circuit-level innovation) presents data that should make SK Hynix pay attention.

Samsung's new HBM4 — the latest generation — posted what Patel describes as "best-in-class performance" at the conference. The headline number: a 3.3 TB/s (terabytes per second) bandwidth stack, using 2048 IO pins (the connections between the memory and the processor), configured as a 36 GB, 12-high stack (twelve chips layered on top of each other). The key architectural move: HBM4 separates the process technology used for the core memory dies from the base die (the logic chip that sits at the bottom and manages communication with the processor). Samsung is now building that base die on its SF4 logic process — a more advanced manufacturing node — while keeping the core dies on its own DRAM process. This is technically significant because logic processes are better suited for the high-speed signaling needed to push 3.3 TB/s through the interface.

Patel's assessment is carefully hedged: Samsung still lags SK Hynix in reliability and stability — the kind of thing that matters enormously when you're running data centers at scale — but the technology gap on raw performance is closing. Samsung's HBM4 can reportedly meet the pin speed required for Nvidia's upcoming Rubin architecture (Nvidia's next-generation AI accelerator platform, successor to the current Blackwell generation) while staying below 1V, which is an important power constraint.

The ISSCC coverage also flagged progress on CPO (Co-Packaged Optics — a technique that integrates the optical components for high-speed data transmission directly onto the chip package rather than using external pluggable cables, dramatically reducing latency and power consumption) from both Nvidia and Broadcom (the chip company best known for its networking and custom AI accelerator work). Patel also highlighted advances in UCIe-S, which is a standardized interface for connecting multiple chips together inside a single package — think of it as a high-speed highway that lets chipmakers mix and match components from different manufacturers while guaranteeing they can communicate efficiently. These interconnect technologies are increasingly critical as AI systems scale: the bottleneck is often not the chips themselves but how fast data can move between them.

Separately, Credo Technology Group acquired DustPhotonics in a $1.3 billion cash and stock deal this week — a signal that the optical interconnect space (the technology that uses light rather than electrical signals to move data at extreme speeds inside and between data centers) is attracting serious consolidation capital.


Engels' Pause: When the Machine Surpasses the Expert

O'Loughlin's piece this week steps back from the hardware and asks a harder question about what AI is actually doing to the workforce — and it's worth reading closely.

The trigger is a model he calls Mythos, which O'Loughlin describes as "some kind of step change." The specific capability that marks it as significant: it can find zero-day exploits (previously unknown security vulnerabilities in software, typically discovered by highly skilled human security researchers and worth considerable money because attackers can use them before anyone has patched the system) at scale, with a simple prompt. His framing is direct: "The John Henry moment of man versus machine has already passed." Mythos reportedly found thousands of critical vulnerabilities that had survived decades of human review.

The concept O'Loughlin introduces to frame this is Engels' Pause — a term from economic historian Robert C. Allen describing a specific, troubling pattern from the British Industrial Revolution between 1780 and 1840. Per-capita GDP expanded by 46% during that period. Working-class wages rose by only 12%. The gap wasn't random: it was concentrated in a specific class of skilled artisan workers — people with real expertise who commanded premium wages — who got displaced by machines tended by cheaper labor. The industrialists captured the gains and reinvested them into more capital. The skilled middle class got hollowed out.

O'Loughlin's argument is that this is the shape of the current AI transition: not gradual upskilling across the board, but targeted displacement of exactly the workers who thought their expertise made them safe — cybersecurity researchers, information analysts, anyone whose value comes from holding a complex problem in their head and working through it sequentially. The AI advantage, he argues, is qualitatively different: it holds the entire problem in a single context window and runs attention across all of it simultaneously, rather than the sequential analysis humans do.

This is a semiconductor briefing, so the relevant question is: where does chips-and-infrastructure fit into this picture? The answer is that the compute required to run Mythos-class models exists because of the data center buildout described above, and the memory advances described in the ISSCC section. The hardware story and the labor displacement story are the same story, viewed from different angles.


What to Watch

Three things to hold in mind. First: the geographic spread of data center investment suggests the AI infrastructure wave is past the point of being a story about a few hyperscalers — it's becoming critical infrastructure policy, which means regulatory and political friction will only increase (see: Maine, Virginia, France). Second: Samsung's HBM4 progress matters because competition in the memory market affects the cost and availability of the chips that run AI systems — a more competitive memory market is better for everyone building on top of these models. Third: O'Loughlin's Engels' Pause framing deserves wider attention. The semiconductor industry is building the hardware substrate for a technology that is demonstrably beginning to perform tasks previously reserved for highly skilled professionals. The economic distribution of those gains is going to be the policy story of this decade.


TL;DR - The AI data center buildout is going global fastbillions in new European capacity announced this week, Amazon locking up power in Australia, and Jane Street betting $7 billion on CoreWeave, while local communities from Maine to France start pushing back - Samsung is closing the gap on SK Hynix in the high-bandwidth memory that AI chips need most, posting best-in-class specs at ISSCC — not dominant yet, but competitive enough to matter for Nvidia's next GPU generation - The interconnect layer is heating up — co-packaged optics and chip-to-chip interface standards are emerging as the next frontier in AI hardware performance, with a $1.3 billion acquisition this week signaling where the money is going - Engels' Pause is O'Loughlin's framing to watch — AI is beginning to displace highly skilled knowledge workers (starting with cybersecurity researchers), not just routine labor, mirroring the pattern of skilled artisan displacement in the Industrial Revolution
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  • Doug O'Loughlin (1)
  • Dylan Patel (1)